San Francisco, California (PressExposure) August 27, 2009 -- CoFluent Design, a leading Electronic System Level (ESL) company that provides system-level modeling and simulation to accelerate innovation in embedded devices, today announced that CoFluent Studio allows the creation and automatic generation of SystemC models for CoWareÂ® Platform Architect and Synopsys Innovator products. Models can be integrated to virtual platform environments through the OSCI standard TLM-2.0 interface, offering a continuous development flow from executable specifications to virtual platforms.
Virtual platform environments provide an efficient solution for creating SystemC-based virtual hardware platforms for embedded software development with fast instruction-accurate instruction set simulators (ISS). Creation of a virtual platform model relies on the assembly of models of standard IP blocks available in library.
CoFluent Studio users create virtual system models for early architecture exploration and performance prediction. Models are built from graphical diagrams customized with time and performance attributes. A complete virtual system model including hardware, software and use case descriptions can be obtained with low effort before the first line of hardware or software code is available. CoFluent models are translated into TLM SystemC for simulation and performance data extraction. The same generated SystemC code, obtained with significant productivity gains compared to hand-programming, can be used in virtual platform environments when proprietary/new IP can't be found in vendors' libraries. Test cases developed and validated earlier can also be reused with virtual platforms.
"Our customers need the power of the abstraction level offered by CoFluent Studio to rapidly create innovative components and systems, enabling them to apply for patents before their competitors," said StÃ©phane Leclercq, CEO of CoFluent Design. "Once proprietary IP models are optimized and validated at the functional and architectural level in the context of the full virtual system with CoFluent, they can be integrated to a more detailed virtual platform simulation and serve as executable specifications for implementation."
"SystemC standards-based model interoperability is a key requirement for our customers," said Tom De Schutter, Marketing Manager, IP Models, at CoWare. "The support of SystemC and TLM by our partners is a welcome step, enabling our joint customers to leverage these models in our production-proven CoWare Platform Architect environment."
"Connecting early architecture exploration and virtual platforms for embedded software development and verification has the potential to increase overall productivity," said Frank Schirrmeister, Director, Product Marketing at Synopsys. "CoFluent has taken advantage of the Synopsys System-Level Catalyst program to enable interoperability for the SystemC model ecosystem."
CoFluent Design has joined CoWare's CoTeam partner program and ported its simulation library to CoWare Platform Architect's SystemC kernel. The new CoFluent SystemC Library (SCL) for CoWare product is available now as an addition to its CoFluent Studio v3.0 integrated modeling environment.
CoFluent Design has also joined Synopsys System-Level Catalyst Program and adapted its simulation library to interface to Synopsys Innovator using OSCI TLM-2.0 APIs. The new CoFluent SystemC Library (SCL) for Synopsys Innovator will be available in the fall as an addition to its next CoFluent Studio v3.1 integrated modeling environment.
About CoFluent Design: CoFluent Designâ¢ provides system-level modeling and simulation tools that enable embedded device and chip designers to imagine and validate new concepts and architectures. CoFluent Studioâ¢ generates SystemC transactional models from graphics and standard C that describe complex multi-OS, multi-core systems in consumer electronics and telecoms. CoFluent Readerâ¢ enables efficient exchange of executable specifications with all project stakeholders and contractors.
CoFluent is used throughout the product development lifecycle for:
* Innovation: capturing with minimal effort the design intent in reusable models that mix new features and legacy, allowing for early patent application * Optimization: finding the optimal architecture and power efficiency through design space exploration free of the full hardware/software code * Validation: defining use case scenarios for validating the real-time behavior, predicting performance and generating test cases for implementation