Intilop TCP Offload Engine Delivers Full TCP Offload in Less than 100 nanoseconds

Santa Clara, CA (PressExposure) February 22, 2012 -- Intilop TCP Offload Engine Delivers Full TCP Offload in Less than 100 nanoseconds Using Altera's Stratix IV FPGA

Intilop to perform live demo of their 4th Gen SX-Series 10G Ultra-Low Latency TCP Offload Engines and complete server system at the Upcoming Ethernet Summit

Intilop, Inc. a pioneer and a recognized leader in providing highly complex Ultra-Low latency networking Mega IP building blocks, systems and solutions, announced they will showcase their 4th Gen. SX-Series 10G Ultra-Low latency TOE + EMAC + Altera_PHY Mega IP cores running on Stratix® IV FPGA. The live demo will be showcased on Feb 22nd 2012 at the Ethernet Summit at Hilton-Double tree in San Jose, CA. This is the first time the Full TOE + EMAC latency barrier of 100 nanoseconds has been shattered which further solidifies Intilop's leadership position.

"It was a significant achievement to port our Mega-IP block and systems solutions on a Stratix IV FPGA and deliver sub-100 nanoseconds TCP Offload latency. The user-friendly features in Altera's Quartus II software allowed us to implement logic and run it at full speed without much difficulty. The Mega IP complex takes full advantage of all of the architectural features in the Stratix IV FPGA, delivering sub-100 nanosecond latency with highest performance and bandwidth. Our previous Gen X-Series10G TOE last year also achieved a record breaking latency of 180 ns on Stratix IV FPGAs"said K Masood, President and CTO of Intilop.

"It is a pleasure to work with leading-edge technology partners like Intilop that enable leading edge solutions for the Computer and Storage market by fully utilizing the leading features of our FPGAs. With their TCP Offload Engine, Intilop developed a total system solution that utilizes the best of Stratix IV FPGA design features resulting in an industry-leading low latency Ethernet TOE solution. Beating the 100 nanosecond barrier extends the leadership position we have with our FPGA product line."said David McIntyre, senior business manager for Altera's computer and storage business unit.

Latency of less than 100 nanoseconds for the 4th Gen 10G TOE and UOE sets the bar much higher for speed and performance based upon a mature, proven and TCP Protocol Compliant architecture. It not only offers sub-100 ns latency and near wire speed TCP performance, it also offers customization flexibility to network architects to design world-class system-level applications tailored to their specific needs.

The highly deterministic performance, reliable and proven ultra-low latency, coupled with customizability offered by the SX-Series 10G TOE can be effectively applied to gain wire-speed competitive edge by all Networking Equipment makers. Moreover, the SX-Series offers unprecedented TCP throughput of more than 95% for large and small payload sizes on a 10G network, which is 8-15x higher as compared to the prevalent TCP/IP software.

The TOE's architecture is highly scalable, customizable and adaptable without compromising on low latency or performance. Intilop's product-line solutions are available in flexible FPGA/ASIC/SoC technologies which can easily accommodate diverse set of appliance maker's technical design specifications.

About Intilop:

Intilop is a developer and pioneer in advanced networking silicon IP and system solutions, custom hardware solutions, SoC/ASIC/FPGA integrator and total system solutions provider for Networking, Network Security, storage and Embedded Systems. They offer silicon proven semiconductor IPs with comprehensive hardware and software solutions.

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Intilop Corporation. 4800 Great America Blvd. Ste 231. Santa Clara, CA 95054

About Intilop Corporation

Intilop Corporation
4800 Great America Blvd. Ste 231. Santa Clara, CA 95054
Ph: (408) 496-0333
Fax: (408) 496-0444

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Press Release Submitted On: February 22, 2012 at 8:46 am
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